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This paper presents a design approach for the modeling and simulation of ultra-low power (ULP) analog computing machine learning (ML) circuits for seizure detection using EEG signals in wearable health monitoring applications. In this paper, we describe a new analog system modeling and simulation technique to associate power consumption, noise, linearity, and other critical performance parameters of analog circuits with the classification accuracy of a given ML network, which allows to realize a power and performance optimized analog ML hardware implementation based on diverse application-specific needs. We carried out circuit simulations to obtain non-idealities, which are then mathematically modeled for an accurate mapping. We have modeled noise, non-linearity, resolution, and process variations such that the model can accurately obtain the classification accuracy of the analog computing based seizure detection system. Noise has been modeled as an input-referred white noise that can be directly added at the input. Device process and temperature variations were modeled as random fluctuations in circuit parameters such as gain and cut-off frequency. Nonlinearity was mathematically modeled as a power series. The combined system level model was then simulated for classification accuracy assessments. The design approach helps to optimize power and area during the development of tailored analog circuits for ML networks with the ability to potentially trade power and performance goals while still ensuring the required classification accuracy. The simulation technique also enables to determine target specifications for each circuit block in the analog computing hardware. This is achieved by developing the ML hardware model, and investigating the effect of circuit nonidealities on classification accuracy. Simulation of an analog computing EEG seizure detection block shows a classification accuracy of 91%. The proposed modeling approach will significantly reduce design time and complexity of large analog computing systems. Two feature extraction approaches are also compared for an analog computing architecture. 

Massive deployments of wireless sensor nodes (WSNs) that continuously detect physical, biological or chemical parameters are needed to truly benefit from the unprecedented possibilities opened by the Internet-of-Things (IoT). Just recently, new sensors with higher sensitivities have been demonstrated by leveraging advanced on-chip designs and microfabrication processes. Yet, WSNs using such sensors require energy to transmit the sensed information. Consequently, they either contain batteries that need to be periodically replaced or energy harvesting circuits whose low efficiencies prevent a frequent and continuous sensing and impact the maximum range of communication. Here, we report a new chip-less and battery-less tag-based WSN that fundamentally breaks any previous paradigm. This WSN, formed by off-the-shelf lumped components on a printed substrate, can sense and transmit information without any need of supplied or harvested DC power, while enabling full-duplex transceiver designs for interrogating nodes rendering them immune to their own self-interference. Also, even though the reported WSN does not require any advanced and expensive manufacturing, its unique parametric dynamical behavior enables extraordinary sensitivities and dynamic ranges that can even surpass those achieved by on-chip sensors. The operation and performance of the first implementation of this new WSN are reported. This device operates in the Ultra-High-Frequency range and is capable to passively and continuously detect temperature changes remotely from an interrogating node.